16件のit process expertのおすすめの求人

Senior Layout Design Engineer
AMETEK, Inc. —港区芝大門
- CAD
- 修士号
Laser Semiconductor Engineer
Lumentum —相模原市
- Microsoft Excel
- 博士号
HMI Regional Product Management (RPM)
ASML —千歳市
Salesforce Global Administrator
IDEC株式会社 —大阪市西宮原
- CRMソフトウェア
- 管理職・マネジメント経験
- 営業経験
Global Therapeutic Research Lead (Oligo)
Takeda Pharmaceutical —藤沢市
- 博士号
- IT経験
- 在宅OK
- 育休あり
Controlling Manager
MAHLE GmbH —沼津市
- 経理・会計
- IT経験
Medical Instrument Technician (Ultrasound)
US Military Treatment Facilities under DHA —岩国市
- アルバイト・パート
Container Fleet Maintenance and Repair Senior Specialist Japan
CMA CGM —横浜市
- Microsoft Excel
- IT経験
Senior Manager, Marketing, UGG
Deckers Brands —港区
ADAS Project Security and Privacy Manager
Aumovio —横浜市新浦島町
- コミュニケーションスキル
クイック応募
AWS Business Development Executive (Presales)
SoftwareOne —港区
- 営業経験
- AWS
- IT経験
Compliance Senior Manager - Japan
Wise —中央区
- 年俸 1,980万円 ~ 2,250万円
- 二か国語
クイック応募
Associate Intern, Client Services- Japanese Speaker (2027 Graduate)
Third Bridge —東京都
- 営業経験
- インターンシップ
クイック応募
Solution Engineer (Cybersecurity, Tokyo)
OPSWAT —大阪市
- Azure
- 営業経験
- Windows
クイック応募
Technical Consultant - ITOM
ServiceNow —港区
- 一部在宅
クイック応募
Technical Consultant - Core Business Workflow
ServiceNow —千代田区有楽町
- 一部在宅
クイック応募

More jobs to discover

Find similar jobs that you might be interested in.

Laser Semiconductor Engineer
Lumentum —相模原市
Develop core technologies for next-generation optical devices that enable advanced performance and/or scalable architectures.

it process expertの新着求人をメールで受け取る

アカウントにログインすることにより、SimplyHired本サイトの利用規約、Cookieポリシーおよびプライバシー規約に同意します。

Senior Layout Design Engineer

AMETEK, Inc. -
港区芝大門

今すぐ応募する

求人の詳細

資格とスキル

CAD
修士号

仕事内容の詳細

Location: Tokyo, JP, 105-0012

Business Unit: Vision Research

Posting Date: Jun 5, 2026

Job Description:

Position Summary:

We are seeking a highly skilled Senior Analog Layout Engineer to lead the physical layout of complex analog, mixed‑signal, and high‑performance IC designs. This role requires deep expertise in custom layout techniques, advanced process nodes, physical verification, and close collaboration with circuit designers to deliver silicon‑proven designs that meet stringent performance, reliability, and manufacturing requirements.

Primary Responsibilities:

Own and execute the full layout lifecycle for analog and mixed‑signal IP blocks such as ADCs, DACs, PLLs, LDOs, bandgaps, amplifiers, and pixels.
Collaborate closely with circuit design engineers to understand specifications, constraints, and performance trade-offs.
Develop floorplans, layout strategies, and routing plans that optimize matching, noise performance, EM/IR robustness
Perform custom layout of critical analog circuits using industry‑standard EDA tools (e.g., Cadence Virtuoso).
Ensure compliance with design rules (DRC), electrical rules (ERC), layout-vs-schematic checks (LVS), and parasitic extraction (PEX).
Drive layout quality through guard‑ringing, shielding, isolation techniques, symmetry enforcement, and dummy placements.
Work with foundry PDKs to interpret process rules, device models, and reliability requirements (ESD, EM, latch‑up).
Generate and maintain layout documentation, checklists, and layout guidelines for internal use.
Prepare designs for tapeout, including final checks, documentation, and coordination with the fabrication team.
Develop and maintain scripts to automate repetitive tasks, improving efficiency and consistency in the design process.
Participate in technical reviews with design team and customer.
Able to work independently and collaborate with local technical lead.

Position Requirements:

Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or related field.
4-7+ years of experience in analog or mixed‑signal IC layout.
Expert proficiency with Cadence Virtuoso or equivalent layout platforms.

Deep understanding of:

Analog layout matching and common centroid techniques
Low‑noise, low‑offset layout methodologies
Parasitic‑aware design and optimization
Strong understanding of DRC, LVS, PEX flows and physical verification tools (Calibre, Assura, PVS).
Ability to work in a fast‑paced, collaborative environment with designers, CAD engineers, and verification teams.
Excellent communication and documentation skills.

About Us: Forza Silicon is a Business Unit in the Materials Analysis Division of AMETEK, Inc. Founded in 2001, Forza Silicon has established itself as an innovator and industry leader in the field of mixed-signal IC and CMOS imaging designs that have set the standard of the possible. Primarily through long standing customer relationships and partner referrals, Forza has grown to where today the company employs one of the industry’s largest and most experienced independent CMOS imaging engineering teams. To learn more about Forza Silicon, please go to www.forzasilicon.com

Compensation

Currency: JPY

Salary Minimum: Market

Salary Maximum: Market

Incentive: Market

Disclaimer: Where a specific pay range is noted, it is a good faith estimate at the time of this posting. The actual salary offered will be based on experience, skills, qualifications, market / business considerations, and geographic location.

AMETEK, Inc. is a leading global provider of industrial technology solutions serving a diverse set of attractive niche markets with annual sales over $7.5 billion.

AMETEK is committed to making a safer, sustainable, and more productive world a reality. We use differentiated technology solutions to solve our customers’ most complex challenges. We employ 22,000 colleagues, in 35 countries, that are grounded by our core values: Ethics and Integrity, Respect for the Individual, Inclusion, Teamwork, and Social Responsibility. AMETEK is a component of the S&P 500. Visit https://www.ametek.com/careers for more information.

今すぐ応募する

検索を絞り込む

it process expert 件

Senior Layout Design Engineer

Laser Semiconductor Engineer

HMI Regional Product Management (RPM)

Salesforce Global Administrator

Global Therapeutic Research Lead (Oligo)

Controlling Manager

Medical Instrument Technician (Ultrasound)

Container Fleet Maintenance and Repair Senior Specialist Japan

Senior Manager, Marketing, UGG

ADAS Project Security and Privacy Manager

AWS Business Development Executive (Presales)

Compliance Senior Manager - Japan

Associate Intern, Client Services- Japanese Speaker (2027 Graduate)

Solution Engineer (Cybersecurity, Tokyo)

Technical Consultant - ITOM

Technical Consultant - Core Business Workflow

More jobs to discover

it process expertの新着求人をメールで受け取る

求職者向けツール

採用企業向けツール

求人を探す

Indeed とつながる