About SiTime
SiTime Corporation is the precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry. For more information, visit www.sitime.com.
Job Summary
The Senior Principal Analog Mixed-Signal Design Engineer contributes to building precision timing circuits, leveraging SiTime’s industry-leading MEMS technology. These products have applications ranging from high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms, including wearable devices.
It is not necessary to meet all job requirements to be a qualified candidate for the position.
Responsibilities:
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Contribute to the architectural definition of the design and chip integration
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Technical leader for chip level design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM
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Work closely with Layout Engineers to validate proper layout, using all best-known methods
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Document assigned blocks, and hold preliminary and final design review meetings
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Actively participate in the chip bring-up, evaluation and characterization, with emphasis on owned blocks
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Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks
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Coach, mentor and develop junior/mid-level analog designers, foster cross-functional collaboration.
Qualifications & Requirements:
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M.S. in Electrical Engineering or related field with minimum 15 years of related experience, or Ph.D. in Electrical Engineering with minimum 12 years of related experience
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Excellent academic record with published research projects prototyped and proven in silicon
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Detailed knowledge of CMOS circuits and noise analysis
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Core expertise in one of the following areas:
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Integer-N and fractional-N PLL
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Sigma-Delta ADCs
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Temperature sensor
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Analog and digital filters
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Quartz or MEMS oscillator
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Sub-threshold circuits
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Low noise regulator and bandgap
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High-speed output drivers
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Ability to oversee circuit layout for critical blocks
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Knowledge of programming languages: MATLAB, VerilogA
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Proficient in using Cadence analog design tools
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Good facilitation skill for project/design review meeting
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Excellent analytical, problem-solving, written/verbal communication.
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Proven leadership and ability to collaborate across system architects, digital teams, layout, test, manufacturing
Desired Characteristics & Attributes:
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Passionate, self-starter with a strong commitment to flawless execution
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Excellent written and verbal communication skills required
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Ability to work well with others in a fast-paced collaborative team environment
In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.
SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law.
Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.
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Innovation on Top – Philosophies of Innovation with Rajesh Vashist
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Fabrication Knowledge – An Interview with Rajesh Vashist
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SiTime Corporation – YouTube
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